Vertical alignment (VA for short) liquid crystal display devices can be achieved through a plurality of approaches. According to a first approach, a projection is disposed on a substrate, and liquid crystal molecules are allowed to generate a certain pretilt angle in the vicinity of the projection, so as to be guided to tilt toward a predetermined direction. A second approach comprises etching grooves in indium tin oxide (ITO) electrode layers of an upper substrate and a lower substrate, so as to allow an electric field line to generate a certain tilt angle. Thus, a tilt direction of liquid crystal molecules can be controlled. Such a technology is termed patterned vertical alignment (PVA for short).
In connection with a third approach, an ITO electrode layer provided on an array substrate is etched with a gap, while an ITO electrode layer provided on a color filter substrate is a plate electrode. Meanwhile, a reactive monomer (RM for short) is added in liquid crystals. While a voltage is applied, ultraviolet light can be used to irradiate for polymerization, thereby forming a granular projection on a surface of the substrate, and leading crystal molecules to tilt toward a certain direction. An alignment effect can thus be achieved. This technology is termed polymer stabilized vertical alignment (PSVA for short).
PSVA liquid crystal display devices have such advantages as a high contrast and an ultralow dark state effect. In PSVA liquid crystal display devices of large viewing angles, however, gamma curves would deviate. That is, color shift occurs, thereby deteriorating watching effects. In order to attenuate color shift at a large viewing angle, and enlarge the viewing angle, engineers have divided a sub pixel into a main area and a slave area through a circuit design. Deviation of the gamma curves generated at a large viewing angle of the sub pixel divided into the main area and the slave area can be relieved, thereby attenuating the color shift at a large viewing angle. However, variation in the circuit design would increase the numbers of gate lines, data lines, and thin film transistors, thereby decreasing an aperture ratio and increasing drive difficulty.